Memory chips just 10 atoms thick could vastly increase capacity


Current silicon chips are extremely dense, but ultra-thin 2D materials could make them even more compact

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Working memory chips just 10 atoms thick could lead to radically larger storage capacity in electronic devices like smartphones.

After decades of miniaturisation, current computer chips now have vanishingly small components, often cramming tens of billions of transistors into an area the size of a fingernail. But while the size of components on a silicon wafer has become extremely small, the wafers themselves remain relatively thick – meaning there are limits to how much you can increase the complexity of chips by stacking multiple layers on top of each other.

Scientists have been working on thinner chips made from so-called 2D materials such as graphene, which is formed of a single layer of carbon atoms and is theoretically as thin as a material can be. But until now, only simple chip designs could be constructed with such materials, and it has been tricky to connect them to traditional processors and integrate them into electrical devices.

Now Chunsen Liu at Fudan University in Shanghai and his colleagues have combined a 2D chip around 10 atoms thick with a type of chip called CMOS, which is currently used in computers. The way these chips are manufactured leaves a rough surface, which makes it difficult to lay a 2D sheet over it. Liu and his colleagues overcame this by separating the 2D chip from the traditional CMOS chip with a layer of glass, which is not part of current processes and would need to be industrialised before mass production.

The team’s prototype working memory module achieved more than 93 per cent accuracy in tests. Although this falls far short of the reliability needed for consumer devices, it represents a promising proof of concept.

“This is a very interesting technology with huge potential, but still a long way to go before it is commercially viable,” says Steve Furber at the University of Manchester, UK.

Kai Xu at King’s College London says shrinking current chip designs further without using 2D materials will be problematic because signal leakage occurs when traditional components are made with extremely small widths. Reducing the thickness of layers may overcome this effect – meaning that miniaturisation in terms of thickness could potentially allow yet further miniaturisation in width.

“Silicon has already hit obstacles,” says Xu. “The 2D material might be able to overcome those effects. If it’s very thin, the control at the gate can be more even, can be more perfect, so there’s less leakage.”

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Publish date : 2025-10-08 16:00:00

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